Programming - Day 3, Assembly/NASM

Alright, so my programming game continues today with Chapter Two of Guide to Assembly Language Programming in Linux!

So, I want to start off by saying I am not really committed to becoming a programmer. I am only really interested in a better understanding of the computer in general. So I’ve received a few e-mails telling me assembly and even C were bad directions for a programming newb, and I certainly thank most of your for your input. But really, these languages are more in touch with hardware and think this is a good sandbox for now. Anyhow, I did actually take MIPS assembly programming once upon a time, so it’s not that new to me.

Fortunately for me Mr. Dandamudi, (the author), divided this next chapter into 3 parts, I am only tackling one for tonight as I only have 20 minutes before it’s time to get some sleep.

This section talks about the concept of a AND, OR and NOT. These are real simple concepts I think everyone learned in high school and if you didn’t learn it there you learned it in your electronics or network classes. I’ll do a quick recap, trust me you already know this. Oh, and by the way they call these “logic gates” for some random reason.
1 AND 1 = 1
1 AND 0 = 0
0 AND 0 = 0
Remember it now? I am sure you do.
1 or 1 = 1
1 or 0 = 1
0 or 0 = 0
Here’s the tough one, NOT…this just mean invert it, so…
1 becomes 0
0 becomes 1

So basically all data flows over three pathways (“buses”) in your standard computer. These are called address, data and control. The data passing through is controlled by those three commands from above. (well actually, I just read HP invented a 4th logic type for a circuit, but I am not certain how this fits in)

So anyway, the three buses (“pathways”) flow to the three main components of a computer logic board (“motherboard”). There three main components are Processor, memory and IO system. As you can imagine, all data flows between these three components with the CPU always functioning as the middle man passing the data from IO to memory and back. (I know, we all know about direct memory access technologies, but for the purposes of this chapter, ignore those)

We also get a little bit of volcab in this chapter.

Master/Slave – not just for jumper anymore! Master would be the initiator of the action while the slave is the receiver.
Propagation Delay – the time for a logic gate operation to take
Fanin/fanout – maximum logic gates that can run in and out

Alright, that’s enough for tonight. Next time I feel like it, I’ll have more ramblings from Chapter 2 page 25, simple logic gates.